CPU components

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It controls and coordinates the CPU: it fetches and decodes instructions and sends control signals telling the other components what to do and when. It does no calculating itself.

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It performs all arithmetic operations (add, subtract, multiply, divide) and logic operations (AND, OR, NOT, and comparisons) on data.

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The address of the **next** instruction to be executed. It advances after each instruction is fetched.

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The MAR holds the **address** being accessed; the MDR holds the **value** travelling to or from memory. Address versus data.

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The instruction currently being executed, held there while the CU decodes and carries it out.

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The number the ALU is working on — both the value going in and the answer coming out. ADD 5 turns a 12 in the accumulator into 17, in the same register.

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**Address bus** — the memory address (one-way, CPU → memory). **Data bus** — the data or instruction itself (two-way). **Control bus** — the CU's commands and timing signals (two-way).

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Only work that can be divided between cores benefits. If each step depends on the previous result, the work cannot be split and extra cores sit idle.

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Registers sit inside the CPU and can be reached almost instantly, whereas RAM is much slower. Holding working values in registers stops the ALU waiting on memory.